
Transceiver.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         000008a6  00000000  00000000  00000074  2**1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .data         0000001c  00800060  000008a6  0000091a  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  2 .bss          00000025  0080007c  000008c2  00000936  2**0
                  ALLOC
  3 .debug_aranges 00000060  00000000  00000000  00000936  2**0
                  CONTENTS, READONLY, DEBUGGING
  4 .debug_pubnames 00000275  00000000  00000000  00000996  2**0
                  CONTENTS, READONLY, DEBUGGING
  5 .debug_info   00000b1f  00000000  00000000  00000c0b  2**0
                  CONTENTS, READONLY, DEBUGGING
  6 .debug_abbrev 000004ac  00000000  00000000  0000172a  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_line   00000dc9  00000000  00000000  00001bd6  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_frame  00000250  00000000  00000000  000029a0  2**2
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_str    000002e7  00000000  00000000  00002bf0  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_loc    000003b5  00000000  00000000  00002ed7  2**0
                  CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:

00000000 <__vectors>:
   0:	0c 94 2a 00 	jmp	0x54	; 0x54 <__ctors_end>
   4:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
   8:	0c 94 49 00 	jmp	0x92	; 0x92 <__vector_2>
   c:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  10:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  14:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  18:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  1c:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  20:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  24:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  28:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  2c:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  30:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  34:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  38:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  3c:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  40:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  44:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  48:	0c 94 4b 03 	jmp	0x696	; 0x696 <__vector_18>
  4c:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>
  50:	0c 94 47 00 	jmp	0x8e	; 0x8e <__bad_interrupt>

00000054 <__ctors_end>:
  54:	11 24       	eor	r1, r1
  56:	1f be       	out	0x3f, r1	; 63
  58:	cf e5       	ldi	r28, 0x5F	; 95
  5a:	d4 e0       	ldi	r29, 0x04	; 4
  5c:	de bf       	out	0x3e, r29	; 62
  5e:	cd bf       	out	0x3d, r28	; 61

00000060 <__do_copy_data>:
  60:	10 e0       	ldi	r17, 0x00	; 0
  62:	a0 e6       	ldi	r26, 0x60	; 96
  64:	b0 e0       	ldi	r27, 0x00	; 0
  66:	e6 ea       	ldi	r30, 0xA6	; 166
  68:	f8 e0       	ldi	r31, 0x08	; 8
  6a:	02 c0       	rjmp	.+4      	; 0x70 <.do_copy_data_start>

0000006c <.do_copy_data_loop>:
  6c:	05 90       	lpm	r0, Z+
  6e:	0d 92       	st	X+, r0

00000070 <.do_copy_data_start>:
  70:	ac 37       	cpi	r26, 0x7C	; 124
  72:	b1 07       	cpc	r27, r17
  74:	d9 f7       	brne	.-10     	; 0x6c <.do_copy_data_loop>

00000076 <__do_clear_bss>:
  76:	10 e0       	ldi	r17, 0x00	; 0
  78:	ac e7       	ldi	r26, 0x7C	; 124
  7a:	b0 e0       	ldi	r27, 0x00	; 0
  7c:	01 c0       	rjmp	.+2      	; 0x80 <.do_clear_bss_start>

0000007e <.do_clear_bss_loop>:
  7e:	1d 92       	st	X+, r1

00000080 <.do_clear_bss_start>:
  80:	a1 3a       	cpi	r26, 0xA1	; 161
  82:	b1 07       	cpc	r27, r17
  84:	e1 f7       	brne	.-8      	; 0x7e <.do_clear_bss_loop>
  86:	0e 94 85 00 	call	0x10a	; 0x10a <main>
  8a:	0c 94 51 04 	jmp	0x8a2	; 0x8a2 <_exit>

0000008e <__bad_interrupt>:
  8e:	0c 94 00 00 	jmp	0	; 0x0 <__vectors>

00000092 <__vector_2>:
	}

}

ISR(INT1_vect)
{
  92:	1f 92       	push	r1
  94:	0f 92       	push	r0
  96:	0f b6       	in	r0, 0x3f	; 63
  98:	0f 92       	push	r0
  9a:	11 24       	eor	r1, r1
  9c:	2f 93       	push	r18
  9e:	3f 93       	push	r19
  a0:	4f 93       	push	r20
  a2:	5f 93       	push	r21
  a4:	6f 93       	push	r22
  a6:	7f 93       	push	r23
  a8:	8f 93       	push	r24
  aa:	9f 93       	push	r25
  ac:	af 93       	push	r26
  ae:	bf 93       	push	r27
  b0:	ef 93       	push	r30
  b2:	ff 93       	push	r31
	extern volatile N_ROTE_paket Paket_out, Paket_in;

	LED_1;																//aktivace led
  b4:	c1 9a       	sbi	0x18, 1	; 24
	delay(65000);
  b6:	88 ee       	ldi	r24, 0xE8	; 232
  b8:	9d ef       	ldi	r25, 0xFD	; 253
  ba:	0e 94 d4 00 	call	0x1a8	; 0x1a8 <delay>
	delay(65000);
  be:	88 ee       	ldi	r24, 0xE8	; 232
  c0:	9d ef       	ldi	r25, 0xFD	; 253
  c2:	0e 94 d4 00 	call	0x1a8	; 0x1a8 <delay>
	sprintf(&Paket_out.Data_buf,"Hello!!!:)");							//zapis dat do vysilaciho bufferu
  c6:	60 e6       	ldi	r22, 0x60	; 96
  c8:	70 e0       	ldi	r23, 0x00	; 0
  ca:	83 e9       	ldi	r24, 0x93	; 147
  cc:	90 e0       	ldi	r25, 0x00	; 0
  ce:	0e 94 4a 04 	call	0x894	; 0x894 <strcpy>
	Send_paket();														//odeslani paketu
  d2:	0e 94 19 02 	call	0x432	; 0x432 <Send_paket>
	
	delay(65000);
  d6:	88 ee       	ldi	r24, 0xE8	; 232
  d8:	9d ef       	ldi	r25, 0xFD	; 253
  da:	0e 94 d4 00 	call	0x1a8	; 0x1a8 <delay>
	delay(65000);
  de:	88 ee       	ldi	r24, 0xE8	; 232
  e0:	9d ef       	ldi	r25, 0xFD	; 253
  e2:	0e 94 d4 00 	call	0x1a8	; 0x1a8 <delay>
	LED_0;																//deaktivace led
  e6:	c1 98       	cbi	0x18, 1	; 24

}
  e8:	ff 91       	pop	r31
  ea:	ef 91       	pop	r30
  ec:	bf 91       	pop	r27
  ee:	af 91       	pop	r26
  f0:	9f 91       	pop	r25
  f2:	8f 91       	pop	r24
  f4:	7f 91       	pop	r23
  f6:	6f 91       	pop	r22
  f8:	5f 91       	pop	r21
  fa:	4f 91       	pop	r20
  fc:	3f 91       	pop	r19
  fe:	2f 91       	pop	r18
 100:	0f 90       	pop	r0
 102:	0f be       	out	0x3f, r0	; 63
 104:	0f 90       	pop	r0
 106:	1f 90       	pop	r1
 108:	18 95       	reti

0000010a <main>:
#define F_CPU 16000000UL




int main (void){
 10a:	85 b7       	in	r24, 0x35	; 53
 10c:	88 60       	ori	r24, 0x08	; 8
 10e:	85 bf       	out	0x35, r24	; 53
	extern volatile N_ROTE_paket Paket_in;
	extern unsigned char ID_RX, my_ID;
	extern volatile unsigned char Receiv_int;
	
	MCUCR |= (1<<ISC11);												//nastaveni preruseni INT1 na tlacitko
	GICR |= (1<<INT1);
 110:	8b b7       	in	r24, 0x3b	; 59
 112:	80 68       	ori	r24, 0x80	; 128
 114:	8b bf       	out	0x3b, r24	; 59

	Receiv_int = 0;														//nastaveni neprijatych dat
 116:	10 92 7c 00 	sts	0x007C, r1

	lcd_init();															//inicializace lcd
 11a:	0e 94 b8 03 	call	0x770	; 0x770 <lcd_init>
	lcd_clrscr();														//smazani lcd
 11e:	0e 94 ac 03 	call	0x758	; 0x758 <lcd_clrscr>
	Init_Transceiver();													//inicializace transceiveru
 122:	0e 94 e2 01 	call	0x3c4	; 0x3c4 <Init_Transceiver>

	Send_paket();														//odeslani zkusebniho prazdneho paketu
 126:	0e 94 19 02 	call	0x432	; 0x432 <Send_paket>

	ID_RX = 0xB0;														//nastaveni adresy prijimace
 12a:	80 eb       	ldi	r24, 0xB0	; 176
 12c:	80 93 7d 00 	sts	0x007D, r24
	my_ID = 0xA0;														//nastaveni vlastni adresy
 130:	80 ea       	ldi	r24, 0xA0	; 160
 132:	80 93 7e 00 	sts	0x007E, r24

	sei();																//povoleni preruseni
 136:	78 94       	sei
	while(1)
	{

		if(Receiv_int == 1)												//podminka prijatych dat
 138:	80 91 7c 00 	lds	r24, 0x007C
 13c:	81 30       	cpi	r24, 0x01	; 1
 13e:	e1 f7       	brne	.-8      	; 0x138 <main+0x2e>
		{
			lcd_clrscr();												//smazani lcd
 140:	0e 94 ac 03 	call	0x758	; 0x758 <lcd_clrscr>
			lcd_gotoxy(0,0);											//nastaveni kurzoru do nuly	
 144:	60 e0       	ldi	r22, 0x00	; 0
 146:	80 e0       	ldi	r24, 0x00	; 0
 148:	0e 94 d3 03 	call	0x7a6	; 0x7a6 <lcd_gotoxy>
			lcd_putc(Paket_in.Data_buf[1]);								//vypsani datoveho paketu
 14c:	80 91 84 00 	lds	r24, 0x0084
 150:	0e 94 0b 04 	call	0x816	; 0x816 <lcd_putc>
			lcd_putc(Paket_in.Data_buf[2]);
 154:	80 91 85 00 	lds	r24, 0x0085
 158:	0e 94 0b 04 	call	0x816	; 0x816 <lcd_putc>
			lcd_putc(Paket_in.Data_buf[3]);
 15c:	80 91 86 00 	lds	r24, 0x0086
 160:	0e 94 0b 04 	call	0x816	; 0x816 <lcd_putc>
			lcd_putc(Paket_in.Data_buf[4]);
 164:	80 91 87 00 	lds	r24, 0x0087
 168:	0e 94 0b 04 	call	0x816	; 0x816 <lcd_putc>
			lcd_putc(Paket_in.Data_buf[5]);
 16c:	80 91 88 00 	lds	r24, 0x0088
 170:	0e 94 0b 04 	call	0x816	; 0x816 <lcd_putc>
			lcd_putc(Paket_in.Data_buf[6]);
 174:	80 91 89 00 	lds	r24, 0x0089
 178:	0e 94 0b 04 	call	0x816	; 0x816 <lcd_putc>
			lcd_putc(Paket_in.Data_buf[7]);
 17c:	80 91 8a 00 	lds	r24, 0x008A
 180:	0e 94 0b 04 	call	0x816	; 0x816 <lcd_putc>
			lcd_putc(Paket_in.Data_buf[8]);
 184:	80 91 8b 00 	lds	r24, 0x008B
 188:	0e 94 0b 04 	call	0x816	; 0x816 <lcd_putc>
			lcd_putc(Paket_in.Data_buf[9]);
 18c:	80 91 8c 00 	lds	r24, 0x008C
 190:	0e 94 0b 04 	call	0x816	; 0x816 <lcd_putc>
			lcd_putc(Paket_in.Data_buf[10]);
 194:	80 91 8d 00 	lds	r24, 0x008D
 198:	0e 94 0b 04 	call	0x816	; 0x816 <lcd_putc>
			Receiv_int = 0;												//nastaveni prazdnych dat
 19c:	10 92 7c 00 	sts	0x007C, r1
			REC_on;														//povoleni preruceni
 1a0:	8b b7       	in	r24, 0x3b	; 59
 1a2:	80 62       	ori	r24, 0x20	; 32
 1a4:	8b bf       	out	0x3b, r24	; 59
 1a6:	c8 cf       	rjmp	.-112    	; 0x138 <main+0x2e>

000001a8 <delay>:
*    Parameters:     cas						                    *
*    Description:    Pauza vykonavajici prazdne cykly		        *
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
 1a8:	01 c0       	rjmp	.+2      	; 0x1ac <delay+0x4>
	while(--cas){
		asm("nop");
 1aa:	00 00       	nop
*    Description:    Pauza vykonavajici prazdne cykly		        *
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
 1ac:	01 97       	sbiw	r24, 0x01	; 1
 1ae:	e9 f7       	brne	.-6      	; 0x1aa <delay+0x2>
		asm("nop");
	}
}
 1b0:	08 95       	ret

000001b2 <Start_SPI>:
*    Parameters:     void                                           *
*                                                                   *
*    Description:    Konfigurace SPI komunikace                		*
*    										                        *
********************************************************************/
void Start_SPI(void){
 1b2:	82 e0       	ldi	r24, 0x02	; 2
 1b4:	87 bb       	out	0x17, r24	; 23

	DDRB  = 0b00000010;								//Nastaveni vstupu/vystupu
	PORTB = 0b00001001;								//Nastaveni pull-up pro vstupu/vystupu
 1b6:	89 e0       	ldi	r24, 0x09	; 9
 1b8:	88 bb       	out	0x18, r24	; 24
	SPCR  = 0b01011011;	
 1ba:	8b e5       	ldi	r24, 0x5B	; 91
 1bc:	8d b9       	out	0x0d, r24	; 13

}
 1be:	08 95       	ret

000001c0 <Start_SPI_soft>:
*    Parameters:     void                                           *
*                                                                   *
*    Description:    Konfigurace softwarove SPI komunikace     		*
*    										                        *
********************************************************************/
void Start_SPI_soft(void){
 1c0:	82 eb       	ldi	r24, 0xB2	; 178
 1c2:	87 bb       	out	0x17, r24	; 23
    
    DDRB  = 0b10110010;								//Nastaveni vstupu/vystupu
	PORTB = 0b00000000;								//Nastaveni pull-up pro vstupu/vystupu
 1c4:	18 ba       	out	0x18, r1	; 24
	
	CS_1;
 1c6:	c4 9a       	sbi	0x18, 4	; 24
	
}
 1c8:	08 95       	ret

000001ca <Start_Inter>:
*                                                                   *
*    Description:    Konfigurace softwarove SPI komunikace     		*
*    										                        *
********************************************************************/
void Start_Inter(void)
{
 1ca:	84 b7       	in	r24, 0x34	; 52
 1cc:	80 64       	ori	r24, 0x40	; 64
 1ce:	84 bf       	out	0x34, r24	; 52
	MCUCSR |= (1<<ISC2);							//Nastaveni preruseni na vzestupnou hranu
	GICR |= (1<<INT2);								//Aktivace preruseni INT2
 1d0:	8b b7       	in	r24, 0x3b	; 59
 1d2:	80 62       	ori	r24, 0x20	; 32
 1d4:	8b bf       	out	0x3b, r24	; 59
}
 1d6:	08 95       	ret

000001d8 <Write_cmd>:
*       Parameters:                                                  *
*       Description:    Funkce vysilani/prijem pro softwarove SPI    *
*********************************************************************/

unsigned int Write_cmd(unsigned int cmd)
{
 1d8:	c7 98       	cbi	0x18, 7	; 24
  unsigned char i;
  unsigned int recv=0;
 
  SCK_0;											//nastaveni pinu SCK na nulu
  CS_0;												//nastaveni pinu CS na nulu
 1da:	c4 98       	cbi	0x18, 4	; 24
 1dc:	22 e3       	ldi	r18, 0x32	; 50
 1de:	30 e0       	ldi	r19, 0x00	; 0
 1e0:	01 c0       	rjmp	.+2      	; 0x1e4 <Write_cmd+0xc>
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
		asm("nop");
 1e2:	00 00       	nop
*    Description:    Pauza vykonavajici prazdne cykly		        *
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
 1e4:	21 50       	subi	r18, 0x01	; 1
 1e6:	30 40       	sbci	r19, 0x00	; 0
 1e8:	e1 f7       	brne	.-8      	; 0x1e2 <Write_cmd+0xa>
 1ea:	60 e0       	ldi	r22, 0x00	; 0
 1ec:	40 e0       	ldi	r20, 0x00	; 0
 1ee:	50 e0       	ldi	r21, 0x00	; 0
  SCK_0;											//nastaveni pinu SCK na nulu
  CS_0;												//nastaveni pinu CS na nulu
  delay(50);
  for(i=0;i<16;i++)									//cyklus vycitani a zapisu dat
  {
    if(cmd&0x8000)
 1f0:	97 ff       	sbrs	r25, 7
 1f2:	02 c0       	rjmp	.+4      	; 0x1f8 <Write_cmd+0x20>
      MDO_1;										//nastaveni pinu MDO na jednicku
 1f4:	c5 9a       	sbi	0x18, 5	; 24
 1f6:	01 c0       	rjmp	.+2      	; 0x1fa <Write_cmd+0x22>
    else
      MDO_0;										//nastaveni pinu MDO na nulu
 1f8:	c5 98       	cbi	0x18, 5	; 24
	delay(1);
    SCK_1;											//nastaveni pinu SCK na jednicku
 1fa:	c7 9a       	sbi	0x18, 7	; 24
 1fc:	27 e0       	ldi	r18, 0x07	; 7
 1fe:	30 e0       	ldi	r19, 0x00	; 0
 200:	01 c0       	rjmp	.+2      	; 0x204 <Write_cmd+0x2c>
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
		asm("nop");
 202:	00 00       	nop
*    Description:    Pauza vykonavajici prazdne cykly		        *
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
 204:	21 50       	subi	r18, 0x01	; 1
 206:	30 40       	sbci	r19, 0x00	; 0
 208:	e1 f7       	brne	.-8      	; 0x202 <Write_cmd+0x2a>
    else
      MDO_0;										//nastaveni pinu MDO na nulu
	delay(1);
    SCK_1;											//nastaveni pinu SCK na jednicku
	delay(7);										//posun prijatych dat o jednicku do leva
    recv <<= 1;
 20a:	44 0f       	add	r20, r20
 20c:	55 1f       	adc	r21, r21
    if((SPI_int & (1 << MDI)))
 20e:	b6 99       	sbic	0x16, 6	; 22
      recv |= 1;									//logicke pricteni jednicky k promene s prijatymi daty
 210:	41 60       	ori	r20, 0x01	; 1
    SCK_0;											//nastaveni pinu SCK na nulu
 212:	c7 98       	cbi	0x18, 7	; 24
 214:	28 e0       	ldi	r18, 0x08	; 8
 216:	30 e0       	ldi	r19, 0x00	; 0
 218:	01 c0       	rjmp	.+2      	; 0x21c <Write_cmd+0x44>
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
		asm("nop");
 21a:	00 00       	nop
*    Description:    Pauza vykonavajici prazdne cykly		        *
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
 21c:	21 50       	subi	r18, 0x01	; 1
 21e:	30 40       	sbci	r19, 0x00	; 0
 220:	e1 f7       	brne	.-8      	; 0x21a <Write_cmd+0x42>
  unsigned int recv=0;
 
  SCK_0;											//nastaveni pinu SCK na nulu
  CS_0;												//nastaveni pinu CS na nulu
  delay(50);
  for(i=0;i<16;i++)									//cyklus vycitani a zapisu dat
 222:	6f 5f       	subi	r22, 0xFF	; 255
 224:	60 31       	cpi	r22, 0x10	; 16
 226:	19 f0       	breq	.+6      	; 0x22e <Write_cmd+0x56>
    recv <<= 1;
    if((SPI_int & (1 << MDI)))
      recv |= 1;									//logicke pricteni jednicky k promene s prijatymi daty
    SCK_0;											//nastaveni pinu SCK na nulu
	delay(8);
    cmd <<= 1;										//posun odesílaných dat o jednicku do leva
 228:	88 0f       	add	r24, r24
 22a:	99 1f       	adc	r25, r25
 22c:	e1 cf       	rjmp	.-62     	; 0x1f0 <Write_cmd+0x18>
  }
  CS_1;												//nastaveni pinu CS na jednicku
 22e:	c4 9a       	sbi	0x18, 4	; 24
  return recv;										//navrat prijatych dat
  
}
 230:	ca 01       	movw	r24, r20
 232:	08 95       	ret

00000234 <Rx_FIFO>:
*       Return Value:   void                                         *
*       Parameters:                                                  *
*       Description:                                                 *
*********************************************************************/
unsigned char Rx_FIFO(void)
{
 234:	cf 93       	push	r28
 236:	df 93       	push	r29
 238:	ce e1       	ldi	r28, 0x1E	; 30
 23a:	d0 e0       	ldi	r29, 0x00	; 0
 23c:	0b c0       	rjmp	.+22     	; 0x254 <Rx_FIFO+0x20>
   unsigned int data_rx, x=30;						//x - pocet opakovani pro prijem platných dat

   while(x--)										//smycka cekajici na platna data	
   {
     data_rx = Write_cmd(0x0000);					//vycteni prikazoveho bytu
 23e:	80 e0       	ldi	r24, 0x00	; 0
 240:	90 e0       	ldi	r25, 0x00	; 0
 242:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
     if((data_rx & 0x8000))							//overeni prikazu, ze jsou prijata data platna
 246:	97 ff       	sbrs	r25, 7
 248:	05 c0       	rjmp	.+10     	; 0x254 <Rx_FIFO+0x20>
     {
       data_rx = Write_cmd(0xB000);					//vycteni datoveho bytu
 24a:	80 e0       	ldi	r24, 0x00	; 0
 24c:	90 eb       	ldi	r25, 0xB0	; 176
 24e:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
 252:	06 c0       	rjmp	.+12     	; 0x260 <Rx_FIFO+0x2c>
*********************************************************************/
unsigned char Rx_FIFO(void)
{
   unsigned int data_rx, x=30;						//x - pocet opakovani pro prijem platných dat

   while(x--)										//smycka cekajici na platna data	
 254:	21 97       	sbiw	r28, 0x01	; 1
 256:	8f ef       	ldi	r24, 0xFF	; 255
 258:	cf 3f       	cpi	r28, 0xFF	; 255
 25a:	d8 07       	cpc	r29, r24
 25c:	81 f7       	brne	.-32     	; 0x23e <Rx_FIFO+0xa>
 25e:	80 e0       	ldi	r24, 0x00	; 0
       return (data_rx & 0x00FF);					//maska a navrat datoveho bytu
     }
   }

   return 0;      									//navrat nula - ruseni zadna data
}  
 260:	df 91       	pop	r29
 262:	cf 91       	pop	r28
 264:	08 95       	ret

00000266 <Clr_VDI>:
*       Return Value:   void                                         *
*       Parameters:                                                  *
*       Description:    vynulování pinu VDI                          *
*********************************************************************/
void Clr_VDI(void)
{
 266:	88 e0       	ldi	r24, 0x08	; 8
 268:	90 e8       	ldi	r25, 0x80	; 128
 26a:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	   Write_cmd(0x8008);
	   Write_cmd(0x0000);
 26e:	80 e0       	ldi	r24, 0x00	; 0
 270:	90 e0       	ldi	r25, 0x00	; 0
 272:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	   Write_cmd(0x80E7);
 276:	87 ee       	ldi	r24, 0xE7	; 231
 278:	90 e8       	ldi	r25, 0x80	; 128
 27a:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	   Write_cmd(0x0000);
 27e:	80 e0       	ldi	r24, 0x00	; 0
 280:	90 e0       	ldi	r25, 0x00	; 0
 282:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
}
 286:	08 95       	ret

00000288 <rf_sleep>:
*       Return Value:   void                                         *
*       Parameters:                                                  *
*       Description:    rezim spanku                                 *
*********************************************************************/
void rf_sleep(void)
{
 288:	81 e0       	ldi	r24, 0x01	; 1
 28a:	92 e8       	ldi	r25, 0x82	; 130
 28c:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0x8201); 							//!er,!ebb,ET,ES,EX,!eb,!ew,DC
	  Write_cmd(0x0000);
 290:	80 e0       	ldi	r24, 0x00	; 0
 292:	90 e0       	ldi	r25, 0x00	; 0
 294:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
}
 298:	08 95       	ret

0000029a <transmit_mode>:
*       Return Value:   void                                         *
*       Parameters:                                                  *
*       Description:    vysilaci mod                                 *
*********************************************************************/
void transmit_mode(void)
{
 29a:	89 e3       	ldi	r24, 0x39	; 57
 29c:	92 e8       	ldi	r25, 0x82	; 130
 29e:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0x8239); 							//!er,!ebb,ET,ES,EX,!eb,!ew,DC
	  Write_cmd(0x0000);
 2a2:	80 e0       	ldi	r24, 0x00	; 0
 2a4:	90 e0       	ldi	r25, 0x00	; 0
 2a6:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
}
 2aa:	08 95       	ret

000002ac <receive_mode>:
*       Return Value:   void                                         *
*       Parameters:                                                  *
*       Description:    prijimaci mod                                *
*********************************************************************/
void receive_mode(void)
{
 2ac:	89 e9       	ldi	r24, 0x99	; 153
 2ae:	92 e8       	ldi	r25, 0x82	; 130
 2b0:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0x8299); 							//!er,!ebb,ET,ES,EX,!eb,!ew,DC
	  Write_cmd(0x0000);
 2b4:	80 e0       	ldi	r24, 0x00	; 0
 2b6:	90 e0       	ldi	r25, 0x00	; 0
 2b8:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
}
 2bc:	08 95       	ret

000002be <FIFO_reset>:
*       Return Value:   void                                         *
*       Parameters:                                                  *
*       Description:    reset zásobníku přijatých dat                *
*********************************************************************/
void FIFO_reset(void)
{
 2be:	81 e8       	ldi	r24, 0x81	; 129
 2c0:	9a ec       	ldi	r25, 0xCA	; 202
 2c2:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	   Write_cmd(0xCA81);
	   Write_cmd(0xCA83);
 2c6:	83 e8       	ldi	r24, 0x83	; 131
 2c8:	9a ec       	ldi	r25, 0xCA	; 202
 2ca:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
}
 2ce:	08 95       	ret

000002d0 <Write_FSK>:
*       Return Value:   void                                         *
*       Parameters:     data (8bitů)                                 *
*       Description:    odešle data do modulu (vysílaná data)        *
*********************************************************************/
void Write_FSK(unsigned char data_m)
{
 2d0:	b0 99       	sbic	0x16, 0	; 22
 2d2:	fe cf       	rjmp	.-4      	; 0x2d0 <Write_FSK>
   while((SPI_int & (1 << IRQ)));				//cekani na ready modulu
   Write_cmd(0xB800 + data_m);					//odeslni dat
 2d4:	90 e0       	ldi	r25, 0x00	; 0
 2d6:	80 50       	subi	r24, 0x00	; 0
 2d8:	98 44       	sbci	r25, 0x48	; 72
 2da:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
}
 2de:	08 95       	ret

000002e0 <Low_power>:
*       Return Value:   void                                         *
*       Parameters:                                                  *
*       Description:    Vypne RF modul                               *
*********************************************************************/
void Low_power(void)
{
 2e0:	88 e0       	ldi	r24, 0x08	; 8
 2e2:	90 e8       	ldi	r25, 0x80	; 128
 2e4:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0x8008);
	  Write_cmd(0x8201); 							// turn OFF krystal
 2e8:	81 e0       	ldi	r24, 0x01	; 1
 2ea:	92 e8       	ldi	r25, 0x82	; 130
 2ec:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xA640);
 2f0:	80 e4       	ldi	r24, 0x40	; 64
 2f2:	96 ea       	ldi	r25, 0xA6	; 166
 2f4:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xC647);
 2f8:	87 e4       	ldi	r24, 0x47	; 71
 2fa:	96 ec       	ldi	r25, 0xC6	; 198
 2fc:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0x94A0);
 300:	80 ea       	ldi	r24, 0xA0	; 160
 302:	94 e9       	ldi	r25, 0x94	; 148
 304:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xC22C);
 308:	8c e2       	ldi	r24, 0x2C	; 44
 30a:	92 ec       	ldi	r25, 0xC2	; 194
 30c:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xCA81);
 310:	81 e8       	ldi	r24, 0x81	; 129
 312:	9a ec       	ldi	r25, 0xCA	; 202
 314:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xCED4);
 318:	84 ed       	ldi	r24, 0xD4	; 212
 31a:	9e ec       	ldi	r25, 0xCE	; 206
 31c:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xC430);
 320:	80 e3       	ldi	r24, 0x30	; 48
 322:	94 ec       	ldi	r25, 0xC4	; 196
 324:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0x9850);
 328:	80 e5       	ldi	r24, 0x50	; 80
 32a:	98 e9       	ldi	r25, 0x98	; 152
 32c:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xCC76);
 330:	86 e7       	ldi	r24, 0x76	; 118
 332:	9c ec       	ldi	r25, 0xCC	; 204
 334:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xE000);
 338:	80 e0       	ldi	r24, 0x00	; 0
 33a:	90 ee       	ldi	r25, 0xE0	; 224
 33c:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xC800);
 340:	80 e0       	ldi	r24, 0x00	; 0
 342:	98 ec       	ldi	r25, 0xC8	; 200
 344:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xC040);
 348:	80 e4       	ldi	r24, 0x40	; 64
 34a:	90 ec       	ldi	r25, 0xC0	; 192
 34c:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
}
 350:	08 95       	ret

00000352 <Init_RF>:
*    Return Value:   void                                           *
*    Parameters:     void						                    *
*    Description:    Nastaveni RF modulu                            *
*    										                        *
********************************************************************/
void Init_RF(void){
 352:	87 ee       	ldi	r24, 0xE7	; 231
 354:	90 e8       	ldi	r25, 0x80	; 128
 356:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>

	  Write_cmd(0x80E7); 							// 868MHz, Tx, Rx FIFO, 12pF
	  Write_cmd(0x8299); 							// turn ON receiver, synthesizer, ocillator, Disables the clock output 
 35a:	89 e9       	ldi	r24, 0x99	; 153
 35c:	92 e8       	ldi	r25, 0x82	; 130
 35e:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xA640);							// center frequency 860,32MHz
 362:	80 e4       	ldi	r24, 0x40	; 64
 364:	96 ea       	ldi	r25, 0xA6	; 166
 366:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xC647); 							// 4.8kbps
 36a:	87 e4       	ldi	r24, 0x47	; 71
 36c:	96 ec       	ldi	r25, 0xC6	; 198
 36e:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0x96A0);							// VDI, SLOW, 134kHz, 0dBm, -103dBm
 372:	80 ea       	ldi	r24, 0xA0	; 160
 374:	96 e9       	ldi	r25, 0x96	; 150
 376:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xC2AC);							// automatically start, digital filter, DQD
 37a:	8c ea       	ldi	r24, 0xAC	; 172
 37c:	92 ec       	ldi	r25, 0xC2	; 194
 37e:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xCAF1);							// interupt level 2
 382:	81 ef       	ldi	r24, 0xF1	; 241
 384:	9a ec       	ldi	r25, 0xCA	; 202
 386:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xCED4);									
 38a:	84 ed       	ldi	r24, 0xD4	; 212
 38c:	9e ec       	ldi	r25, 0xCE	; 206
 38e:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xC483); 							// VDI=1, 
 392:	83 e8       	ldi	r24, 0x83	; 131
 394:	94 ec       	ldi	r25, 0xC4	; 196
 396:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0x9850); 							// modulation parameters, 90kHz, max POWER
 39a:	80 e5       	ldi	r24, 0x50	; 80
 39c:	98 e9       	ldi	r25, 0x98	; 152
 39e:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xCC17);
 3a2:	87 e1       	ldi	r24, 0x17	; 23
 3a4:	9c ec       	ldi	r25, 0xCC	; 204
 3a6:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xE000);							// wake-up time
 3aa:	80 e0       	ldi	r24, 0x00	; 0
 3ac:	90 ee       	ldi	r25, 0xE0	; 224
 3ae:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xC800);							// Low Duty-Cycle
 3b2:	80 e0       	ldi	r24, 0x00	; 0
 3b4:	98 ec       	ldi	r25, 0xC8	; 200
 3b6:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
	  Write_cmd(0xC040);
 3ba:	80 e4       	ldi	r24, 0x40	; 64
 3bc:	90 ec       	ldi	r25, 0xC0	; 192
 3be:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
}
 3c2:	08 95       	ret

000003c4 <Init_Transceiver>:
*    Parameters:     void						                    *
*    Description:    Nastaveni modulu a komunikace s modulem        *
*    										                        *
********************************************************************/
void Init_Transceiver(void)
{
 3c4:	82 eb       	ldi	r24, 0xB2	; 178
 3c6:	87 bb       	out	0x17, r24	; 23
*    										                        *
********************************************************************/
void Start_SPI_soft(void){
    
    DDRB  = 0b10110010;								//Nastaveni vstupu/vystupu
	PORTB = 0b00000000;								//Nastaveni pull-up pro vstupu/vystupu
 3c8:	18 ba       	out	0x18, r1	; 24
	
	CS_1;
 3ca:	c4 9a       	sbi	0x18, 4	; 24
*    Description:    Konfigurace softwarove SPI komunikace     		*
*    										                        *
********************************************************************/
void Start_Inter(void)
{
	MCUCSR |= (1<<ISC2);							//Nastaveni preruseni na vzestupnou hranu
 3cc:	84 b7       	in	r24, 0x34	; 52
 3ce:	80 64       	ori	r24, 0x40	; 64
 3d0:	84 bf       	out	0x34, r24	; 52
	GICR |= (1<<INT2);								//Aktivace preruseni INT2
 3d2:	8b b7       	in	r24, 0x3b	; 59
 3d4:	80 62       	ori	r24, 0x20	; 32
 3d6:	8b bf       	out	0x3b, r24	; 59
 3d8:	88 ec       	ldi	r24, 0xC8	; 200
 3da:	90 e0       	ldi	r25, 0x00	; 0
 3dc:	01 c0       	rjmp	.+2      	; 0x3e0 <Init_Transceiver+0x1c>
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
		asm("nop");
 3de:	00 00       	nop
*    Description:    Pauza vykonavajici prazdne cykly		        *
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
 3e0:	01 97       	sbiw	r24, 0x01	; 1
 3e2:	e9 f7       	brne	.-6      	; 0x3de <Init_Transceiver+0x1a>
{
//	Start_SPI();
    Start_SPI_soft();								//Nastaveni softwarove SPI komunikace
	Start_Inter();									//Nastaveni preruseni od RF modulu pro prijem
	delay(200);
	Low_power();									//Nastaveni RF modulu do Low Power modu
 3e4:	0e 94 70 01 	call	0x2e0	; 0x2e0 <Low_power>
 3e8:	88 ec       	ldi	r24, 0xC8	; 200
 3ea:	90 e0       	ldi	r25, 0x00	; 0
 3ec:	01 c0       	rjmp	.+2      	; 0x3f0 <Init_Transceiver+0x2c>
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
		asm("nop");
 3ee:	00 00       	nop
*    Description:    Pauza vykonavajici prazdne cykly		        *
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
 3f0:	01 97       	sbiw	r24, 0x01	; 1
 3f2:	e9 f7       	brne	.-6      	; 0x3ee <Init_Transceiver+0x2a>
    Start_SPI_soft();								//Nastaveni softwarove SPI komunikace
	Start_Inter();									//Nastaveni preruseni od RF modulu pro prijem
	delay(200);
	Low_power();									//Nastaveni RF modulu do Low Power modu
	delay(200);
	Init_RF();										//Aktivace RF modulu a jeho nastaveni pro komunikaci
 3f4:	0e 94 a9 01 	call	0x352	; 0x352 <Init_RF>
 3f8:	88 ec       	ldi	r24, 0xC8	; 200
 3fa:	90 e0       	ldi	r25, 0x00	; 0
 3fc:	01 c0       	rjmp	.+2      	; 0x400 <Init_Transceiver+0x3c>
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
		asm("nop");
 3fe:	00 00       	nop
*    Description:    Pauza vykonavajici prazdne cykly		        *
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
 400:	01 97       	sbiw	r24, 0x01	; 1
 402:	e9 f7       	brne	.-6      	; 0x3fe <Init_Transceiver+0x3a>
	delay(200);
	Low_power();									//Nastaveni RF modulu do Low Power modu
	delay(200);
	Init_RF();										//Aktivace RF modulu a jeho nastaveni pro komunikaci
	delay(200);
	FIFO_reset();									//Reset prijimaci pametu RF modulu
 404:	0e 94 5f 01 	call	0x2be	; 0x2be <FIFO_reset>
 408:	88 ec       	ldi	r24, 0xC8	; 200
 40a:	90 e0       	ldi	r25, 0x00	; 0
 40c:	01 c0       	rjmp	.+2      	; 0x410 <Init_Transceiver+0x4c>
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
		asm("nop");
 40e:	00 00       	nop
*    Description:    Pauza vykonavajici prazdne cykly		        *
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
 410:	01 97       	sbiw	r24, 0x01	; 1
 412:	e9 f7       	brne	.-6      	; 0x40e <Init_Transceiver+0x4a>
	delay(200);
	Init_RF();										//Aktivace RF modulu a jeho nastaveni pro komunikaci
	delay(200);
	FIFO_reset();									//Reset prijimaci pametu RF modulu
  	delay(200);
  	Write_cmd(0x0000);
 414:	80 e0       	ldi	r24, 0x00	; 0
 416:	90 e0       	ldi	r25, 0x00	; 0
 418:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
  	Write_cmd(0x0000);
 41c:	80 e0       	ldi	r24, 0x00	; 0
 41e:	90 e0       	ldi	r25, 0x00	; 0
 420:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
 424:	88 ec       	ldi	r24, 0xC8	; 200
 426:	90 e0       	ldi	r25, 0x00	; 0
 428:	01 c0       	rjmp	.+2      	; 0x42c <Init_Transceiver+0x68>
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
		asm("nop");
 42a:	00 00       	nop
*    Description:    Pauza vykonavajici prazdne cykly		        *
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
 42c:	01 97       	sbiw	r24, 0x01	; 1
 42e:	e9 f7       	brne	.-6      	; 0x42a <Init_Transceiver+0x66>
  	Write_cmd(0x0000);
	delay(200);



}
 430:	08 95       	ret

00000432 <Send_paket>:
//DB5 nastaví příjmač pokud se adresa shoduje s adresou zařízení ; 
//DB4 nastaví příjmač do nuly, tím označí data za použitá, nepotřebná...
//=================================================================== 

void Send_paket(void)
{
 432:	ef 92       	push	r14
 434:	ff 92       	push	r15
 436:	0f 93       	push	r16
 438:	1f 93       	push	r17
 43a:	cf 93       	push	r28
 43c:	df 93       	push	r29
    unsigned char x;
    unsigned int CRCin;
 
    cli();   										//zakazani preruseni
 43e:	f8 94       	cli
    FIFO_reset();									//reset prijimaci pametu RF modulu
 440:	0e 94 5f 01 	call	0x2be	; 0x2be <FIFO_reset>

    CRCin=0;
    transmit_mode();								//nastaveni RF modulu do vysilaciho modu
 444:	0e 94 4d 01 	call	0x29a	; 0x29a <transmit_mode>
 448:	84 ef       	ldi	r24, 0xF4	; 244
 44a:	91 e0       	ldi	r25, 0x01	; 1
 44c:	01 c0       	rjmp	.+2      	; 0x450 <Send_paket+0x1e>
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
		asm("nop");
 44e:	00 00       	nop
*    Description:    Pauza vykonavajici prazdne cykly		        *
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
 450:	01 97       	sbiw	r24, 0x01	; 1
 452:	e9 f7       	brne	.-6      	; 0x44e <Send_paket+0x1c>
    FIFO_reset();									//reset prijimaci pametu RF modulu

    CRCin=0;
    transmit_mode();								//nastaveni RF modulu do vysilaciho modu
    delay(500);
    Write_cmd(0x0000);
 454:	80 e0       	ldi	r24, 0x00	; 0
 456:	90 e0       	ldi	r25, 0x00	; 0
 458:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
    Write_FSK(0xAA);								//odesilani synchronizacnich dat
 45c:	8a ea       	ldi	r24, 0xAA	; 170
 45e:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0xAA);
 462:	8a ea       	ldi	r24, 0xAA	; 170
 464:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0xAA);
 468:	8a ea       	ldi	r24, 0xAA	; 170
 46a:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0x2D);
 46e:	8d e2       	ldi	r24, 0x2D	; 45
 470:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0xD4);
 474:	84 ed       	ldi	r24, 0xD4	; 212
 476:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Paket_out.Adr_RX = ID_RX;						//nastaveni adresy prijimace
 47a:	80 91 7d 00 	lds	r24, 0x007D
 47e:	80 93 90 00 	sts	0x0090, r24
    Paket_out.Adr_TX = my_ID;						//nastaveni vlastni identifikacni adresy
 482:	80 91 7e 00 	lds	r24, 0x007E
 486:	80 93 8f 00 	sts	0x008F, r24
    Paket_out.Paket_setting = 0x1F;					//nastaveni setting paketu
 48a:	8f e1       	ldi	r24, 0x1F	; 31
 48c:	80 93 91 00 	sts	0x0091, r24

    Write_FSK(Paket_out.Adr_RX);					//odeslani adresy prijimace
 490:	80 91 90 00 	lds	r24, 0x0090
 494:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(Paket_out.Adr_TX);					//odeslani vlastni identifikacni adresy
 498:	80 91 8f 00 	lds	r24, 0x008F
 49c:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(Paket_out.Paket_setting);				//odeslani setting paketu
 4a0:	80 91 91 00 	lds	r24, 0x0091
 4a4:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(Paket_out.Reserved);					//odeslani reserved paketu
 4a8:	80 91 92 00 	lds	r24, 0x0092
 4ac:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>

    CRCin += Paket_out.Adr_RX;						//vypocet kontrolniho souctu
 4b0:	80 91 90 00 	lds	r24, 0x0090
    CRCin += Paket_out.Adr_TX;
 4b4:	90 91 8f 00 	lds	r25, 0x008F
    CRCin += Paket_out.Paket_setting;
 4b8:	20 91 91 00 	lds	r18, 0x0091
    CRCin += Paket_out.Reserved;
 4bc:	30 91 92 00 	lds	r19, 0x0092
    Write_FSK(Paket_out.Adr_TX);					//odeslani vlastni identifikacni adresy
    Write_FSK(Paket_out.Paket_setting);				//odeslani setting paketu
    Write_FSK(Paket_out.Reserved);					//odeslani reserved paketu

    CRCin += Paket_out.Adr_RX;						//vypocet kontrolniho souctu
    CRCin += Paket_out.Adr_TX;
 4c0:	c8 2f       	mov	r28, r24
 4c2:	d0 e0       	ldi	r29, 0x00	; 0
 4c4:	c9 0f       	add	r28, r25
 4c6:	d1 1d       	adc	r29, r1
    CRCin += Paket_out.Paket_setting;
 4c8:	c2 0f       	add	r28, r18
 4ca:	d1 1d       	adc	r29, r1
    CRCin += Paket_out.Reserved;
 4cc:	c3 0f       	add	r28, r19
 4ce:	d1 1d       	adc	r29, r1
 4d0:	ee 24       	eor	r14, r14
 4d2:	ff 24       	eor	r15, r15

    for(x=0;x<11;x++)
    {
      Write_FSK(Paket_out.Data_buf[x]);				//odesilani datovych bytu
 4d4:	87 01       	movw	r16, r14
 4d6:	01 57       	subi	r16, 0x71	; 113
 4d8:	1f 4f       	sbci	r17, 0xFF	; 255
 4da:	f8 01       	movw	r30, r16
 4dc:	84 81       	ldd	r24, Z+4	; 0x04
 4de:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
      CRCin += Paket_out.Data_buf[x];				//vypocet kontrolniho souctu
 4e2:	f8 01       	movw	r30, r16
 4e4:	84 81       	ldd	r24, Z+4	; 0x04
 4e6:	c8 0f       	add	r28, r24
 4e8:	d1 1d       	adc	r29, r1
 4ea:	08 94       	sec
 4ec:	e1 1c       	adc	r14, r1
 4ee:	f1 1c       	adc	r15, r1
    CRCin += Paket_out.Adr_RX;						//vypocet kontrolniho souctu
    CRCin += Paket_out.Adr_TX;
    CRCin += Paket_out.Paket_setting;
    CRCin += Paket_out.Reserved;

    for(x=0;x<11;x++)
 4f0:	fb e0       	ldi	r31, 0x0B	; 11
 4f2:	ef 16       	cp	r14, r31
 4f4:	f1 04       	cpc	r15, r1
 4f6:	71 f7       	brne	.-36     	; 0x4d4 <__stack+0x75>
    {
      Write_FSK(Paket_out.Data_buf[x]);				//odesilani datovych bytu
      CRCin += Paket_out.Data_buf[x];				//vypocet kontrolniho souctu
    }

    Paket_out.CRC = (unsigned char)CRCin;			
 4f8:	c0 93 9e 00 	sts	0x009E, r28
    Write_FSK(Paket_out.CRC);						//odeslani kontrolniho souctu
 4fc:	80 91 9e 00 	lds	r24, 0x009E
 500:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>

    Write_FSK(0xAA);								//odesilani synchronizacnich dat
 504:	8a ea       	ldi	r24, 0xAA	; 170
 506:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0xAA);
 50a:	8a ea       	ldi	r24, 0xAA	; 170
 50c:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0xAA);
 510:	8a ea       	ldi	r24, 0xAA	; 170
 512:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>

  receive_mode();									//nastaveni RF modulu do prijimaciho modu
 516:	0e 94 56 01 	call	0x2ac	; 0x2ac <receive_mode>
  FIFO_reset();										//reset prijimaci pametu RF modulu
 51a:	0e 94 5f 01 	call	0x2be	; 0x2be <FIFO_reset>
  Clr_VDI();										//vynulování pinu VDI
 51e:	0e 94 33 01 	call	0x266	; 0x266 <Clr_VDI>

  sei();											//povoleni preruseni
 522:	78 94       	sei
}
 524:	df 91       	pop	r29
 526:	cf 91       	pop	r28
 528:	1f 91       	pop	r17
 52a:	0f 91       	pop	r16
 52c:	ff 90       	pop	r15
 52e:	ef 90       	pop	r14
 530:	08 95       	ret

00000532 <Receiv_paket>:
*       Return Value:   void                                         *
*       Parameters:                                                  *
*       Description:    Funkce prijmu N-ROTE paketu                  *
*********************************************************************/
void Receiv_paket(void)
{
 532:	0f 93       	push	r16
 534:	1f 93       	push	r17
 536:	cf 93       	push	r28
 538:	df 93       	push	r29
   unsigned char x;
   unsigned int CRC;

    cli();											//zakazani preruseni
 53a:	f8 94       	cli
	CRC=0;
    Paket_in.Adr_RX = Rx_FIFO();					//prijem paketu s RX adresou
 53c:	0e 94 1a 01 	call	0x234	; 0x234 <Rx_FIFO>
 540:	80 93 80 00 	sts	0x0080, r24
    Paket_in.Adr_TX = Rx_FIFO();					//prijem paketu s TX adresou
 544:	0e 94 1a 01 	call	0x234	; 0x234 <Rx_FIFO>
 548:	80 93 7f 00 	sts	0x007F, r24
    Paket_in.Paket_setting = Rx_FIFO();				//prijem setting paketu
 54c:	0e 94 1a 01 	call	0x234	; 0x234 <Rx_FIFO>
 550:	80 93 81 00 	sts	0x0081, r24
    Paket_in.Reserved = Rx_FIFO();					//prijem reserved paketu
 554:	0e 94 1a 01 	call	0x234	; 0x234 <Rx_FIFO>
 558:	80 93 82 00 	sts	0x0082, r24

    CRC += Paket_in.Adr_RX;							//kotrolni soucet prijatych dat
 55c:	80 91 80 00 	lds	r24, 0x0080
    CRC += Paket_in.Adr_TX;
 560:	90 91 7f 00 	lds	r25, 0x007F
    CRC += Paket_in.Paket_setting;
 564:	20 91 81 00 	lds	r18, 0x0081
    CRC += Paket_in.Reserved;
 568:	30 91 82 00 	lds	r19, 0x0082
    Paket_in.Adr_TX = Rx_FIFO();					//prijem paketu s TX adresou
    Paket_in.Paket_setting = Rx_FIFO();				//prijem setting paketu
    Paket_in.Reserved = Rx_FIFO();					//prijem reserved paketu

    CRC += Paket_in.Adr_RX;							//kotrolni soucet prijatych dat
    CRC += Paket_in.Adr_TX;
 56c:	c8 2f       	mov	r28, r24
 56e:	d0 e0       	ldi	r29, 0x00	; 0
 570:	c9 0f       	add	r28, r25
 572:	d1 1d       	adc	r29, r1
    CRC += Paket_in.Paket_setting;
 574:	c2 0f       	add	r28, r18
 576:	d1 1d       	adc	r29, r1
    CRC += Paket_in.Reserved;
 578:	c3 0f       	add	r28, r19
 57a:	d1 1d       	adc	r29, r1
 57c:	00 e0       	ldi	r16, 0x00	; 0
 57e:	10 e0       	ldi	r17, 0x00	; 0

    for(x=0;x<11;x++)
    {
      Paket_in.Data_buf[x] = Rx_FIFO();				//prijem datovych paketu
 580:	0e 94 1a 01 	call	0x234	; 0x234 <Rx_FIFO>
 584:	f8 01       	movw	r30, r16
 586:	e1 58       	subi	r30, 0x81	; 129
 588:	ff 4f       	sbci	r31, 0xFF	; 255
 58a:	84 83       	std	Z+4, r24	; 0x04
      CRC += Paket_in.Data_buf[x];					//kotrolni soucet prijatych dat
 58c:	84 81       	ldd	r24, Z+4	; 0x04
 58e:	c8 0f       	add	r28, r24
 590:	d1 1d       	adc	r29, r1
 592:	0f 5f       	subi	r16, 0xFF	; 255
 594:	1f 4f       	sbci	r17, 0xFF	; 255
    CRC += Paket_in.Adr_RX;							//kotrolni soucet prijatych dat
    CRC += Paket_in.Adr_TX;
    CRC += Paket_in.Paket_setting;
    CRC += Paket_in.Reserved;

    for(x=0;x<11;x++)
 596:	0b 30       	cpi	r16, 0x0B	; 11
 598:	11 05       	cpc	r17, r1
 59a:	91 f7       	brne	.-28     	; 0x580 <Receiv_paket+0x4e>
    {
      Paket_in.Data_buf[x] = Rx_FIFO();				//prijem datovych paketu
      CRC += Paket_in.Data_buf[x];					//kotrolni soucet prijatych dat
    }
    Paket_in.CRC = Rx_FIFO();						//prijem kotrolniho souctu
 59c:	0e 94 1a 01 	call	0x234	; 0x234 <Rx_FIFO>
 5a0:	80 93 8e 00 	sts	0x008E, r24
    CRC &= 0x00FF;
    if ((unsigned char)CRC == Paket_in.CRC)       	//kontrola CRC...
 5a4:	80 91 8e 00 	lds	r24, 0x008E
 5a8:	c8 17       	cp	r28, r24
 5aa:	29 f4       	brne	.+10     	; 0x5b6 <Receiv_paket+0x84>
    {
       Paket_in.Paket_setting |= 0x40;  			//data jou platná
 5ac:	80 91 81 00 	lds	r24, 0x0081
 5b0:	80 64       	ori	r24, 0x40	; 64
 5b2:	80 93 81 00 	sts	0x0081, r24
    }
    if (my_ID == Paket_in.Adr_RX)					//kontrola adresy
 5b6:	90 91 80 00 	lds	r25, 0x0080
 5ba:	80 91 7e 00 	lds	r24, 0x007E
 5be:	89 17       	cp	r24, r25
 5c0:	29 f4       	brne	.+10     	; 0x5cc <Receiv_paket+0x9a>
    {
       Paket_in.Paket_setting |= 0x20;				//adresa vyhovuje my_ID
 5c2:	80 91 81 00 	lds	r24, 0x0081
 5c6:	80 62       	ori	r24, 0x20	; 32
 5c8:	80 93 81 00 	sts	0x0081, r24
    }   
    FIFO_reset();									//reset prijimaci pametu RF modulu
 5cc:	0e 94 5f 01 	call	0x2be	; 0x2be <FIFO_reset>
    Clr_VDI();										//vynulování pinu VDI
 5d0:	0e 94 33 01 	call	0x266	; 0x266 <Clr_VDI>
	sei();											//povoleni preruseni
 5d4:	78 94       	sei
}
 5d6:	df 91       	pop	r29
 5d8:	cf 91       	pop	r28
 5da:	1f 91       	pop	r17
 5dc:	0f 91       	pop	r16
 5de:	08 95       	ret

000005e0 <Send_data>:
*       Return Value:   void                                         *
*       Parameters:                                                  *
*       Description:    Funkce odesilani dat			             *
*********************************************************************/
void Send_data(unsigned char *buffer, unsigned char size)
{
 5e0:	ff 92       	push	r15
 5e2:	0f 93       	push	r16
 5e4:	1f 93       	push	r17
 5e6:	cf 93       	push	r28
 5e8:	df 93       	push	r29
 5ea:	8c 01       	movw	r16, r24
 5ec:	f6 2e       	mov	r15, r22
    unsigned char x;
 
    cli();   										//zakazani preruseni
 5ee:	f8 94       	cli
    FIFO_reset();									//reset prijimaci pametu RF modulu
 5f0:	0e 94 5f 01 	call	0x2be	; 0x2be <FIFO_reset>

    transmit_mode();								//nastaveni RF modulu do vysilaciho modu
 5f4:	0e 94 4d 01 	call	0x29a	; 0x29a <transmit_mode>
    milliseconds can be achieved.
 */
void
_delay_loop_2(uint16_t __count)
{
	__asm__ volatile (
 5f8:	80 ed       	ldi	r24, 0xD0	; 208
 5fa:	97 e0       	ldi	r25, 0x07	; 7
 5fc:	01 97       	sbiw	r24, 0x01	; 1
 5fe:	f1 f7       	brne	.-4      	; 0x5fc <Send_data+0x1c>
    _delay_us(500);
    Write_cmd(0x0000);
 600:	80 e0       	ldi	r24, 0x00	; 0
 602:	90 e0       	ldi	r25, 0x00	; 0
 604:	0e 94 ec 00 	call	0x1d8	; 0x1d8 <Write_cmd>
    Write_FSK(0xAA);								//odesilani synchronizacnich dat
 608:	8a ea       	ldi	r24, 0xAA	; 170
 60a:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0xAA);
 60e:	8a ea       	ldi	r24, 0xAA	; 170
 610:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0xAA);
 614:	8a ea       	ldi	r24, 0xAA	; 170
 616:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0x2D);
 61a:	8d e2       	ldi	r24, 0x2D	; 45
 61c:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0xD4);
 620:	84 ed       	ldi	r24, 0xD4	; 212
 622:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
 626:	e8 01       	movw	r28, r16
 628:	03 c0       	rjmp	.+6      	; 0x630 <Send_data+0x50>

    for(x=0;x<size;x++)								//odesilani datoveho bufferu
    {
      Write_FSK(*buffer);
 62a:	89 91       	ld	r24, Y+
 62c:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0xAA);
    Write_FSK(0xAA);
    Write_FSK(0x2D);
    Write_FSK(0xD4);

    for(x=0;x<size;x++)								//odesilani datoveho bufferu
 630:	9e 01       	movw	r18, r28
 632:	20 1b       	sub	r18, r16
 634:	2f 15       	cp	r18, r15
 636:	c8 f3       	brcs	.-14     	; 0x62a <Send_data+0x4a>
    {
      Write_FSK(*buffer);
      buffer++;
    }

    Write_FSK(0xAA);								//odesilani synchronizacnich dat
 638:	8a ea       	ldi	r24, 0xAA	; 170
 63a:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0xAA);
 63e:	8a ea       	ldi	r24, 0xAA	; 170
 640:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>
    Write_FSK(0xAA);
 644:	8a ea       	ldi	r24, 0xAA	; 170
 646:	0e 94 68 01 	call	0x2d0	; 0x2d0 <Write_FSK>

  receive_mode();									//nastaveni RF modulu do prijimaciho modu
 64a:	0e 94 56 01 	call	0x2ac	; 0x2ac <receive_mode>
  sei();											//povoleni preruseni
 64e:	78 94       	sei
}
 650:	df 91       	pop	r29
 652:	cf 91       	pop	r28
 654:	1f 91       	pop	r17
 656:	0f 91       	pop	r16
 658:	ff 90       	pop	r15
 65a:	08 95       	ret

0000065c <Receiv_data>:
*       Return Value:   void                                         *
*       Parameters:                                                  *
*       Description:    Funkce prijmu dat			                 *
*********************************************************************/
void Receiv_data(unsigned char *buffer, unsigned char size)
{
 65c:	0f 93       	push	r16
 65e:	1f 93       	push	r17
 660:	cf 93       	push	r28
 662:	df 93       	push	r29
 664:	18 2f       	mov	r17, r24
 666:	06 2f       	mov	r16, r22
    unsigned char x;

    cli();											//zakazani preruseni
 668:	f8 94       	cli
 66a:	28 2f       	mov	r18, r24
 66c:	39 2f       	mov	r19, r25
 66e:	c9 01       	movw	r24, r18
 670:	ec 01       	movw	r28, r24
 672:	03 c0       	rjmp	.+6      	; 0x67a <Receiv_data+0x1e>
    for(x=0;x<size;x++)								//prijem dat do bufferu
    {
      *buffer = Rx_FIFO();
 674:	0e 94 1a 01 	call	0x234	; 0x234 <Rx_FIFO>
 678:	89 93       	st	Y+, r24
void Receiv_data(unsigned char *buffer, unsigned char size)
{
    unsigned char x;

    cli();											//zakazani preruseni
    for(x=0;x<size;x++)								//prijem dat do bufferu
 67a:	9e 01       	movw	r18, r28
 67c:	21 1b       	sub	r18, r17
 67e:	20 17       	cp	r18, r16
 680:	c8 f3       	brcs	.-14     	; 0x674 <Receiv_data+0x18>
    {
      *buffer = Rx_FIFO();
      buffer++;
    }
  
    FIFO_reset();									//reset prijimaci pametu RF modulu
 682:	0e 94 5f 01 	call	0x2be	; 0x2be <FIFO_reset>
    Clr_VDI();										//vynulování pinu VDI
 686:	0e 94 33 01 	call	0x266	; 0x266 <Clr_VDI>
	sei();											//povoleni preruseni
 68a:	78 94       	sei
}
 68c:	df 91       	pop	r29
 68e:	cf 91       	pop	r28
 690:	1f 91       	pop	r17
 692:	0f 91       	pop	r16
 694:	08 95       	ret

00000696 <__vector_18>:
*       Return Value:   void                                         *
*       Parameters:                                                  *
*       Description:    Funkce preruseni od transceiveru             *
*********************************************************************/
ISR(INT2_vect)
{
 696:	1f 92       	push	r1
 698:	0f 92       	push	r0
 69a:	0f b6       	in	r0, 0x3f	; 63
 69c:	0f 92       	push	r0
 69e:	11 24       	eor	r1, r1
 6a0:	2f 93       	push	r18
 6a2:	3f 93       	push	r19
 6a4:	4f 93       	push	r20
 6a6:	5f 93       	push	r21
 6a8:	6f 93       	push	r22
 6aa:	7f 93       	push	r23
 6ac:	8f 93       	push	r24
 6ae:	9f 93       	push	r25
 6b0:	af 93       	push	r26
 6b2:	bf 93       	push	r27
 6b4:	ef 93       	push	r30
 6b6:	ff 93       	push	r31
 6b8:	80 e1       	ldi	r24, 0x10	; 16
 6ba:	97 e2       	ldi	r25, 0x27	; 39
 6bc:	01 c0       	rjmp	.+2      	; 0x6c0 <__vector_18+0x2a>
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
		asm("nop");
 6be:	00 00       	nop
*    Description:    Pauza vykonavajici prazdne cykly		        *
*    										                        *
********************************************************************/
void delay(unsigned int cas)
{
	while(--cas){
 6c0:	01 97       	sbiw	r24, 0x01	; 1
 6c2:	e9 f7       	brne	.-6      	; 0x6be <__vector_18+0x28>
	extern volatile unsigned char Receiv_int;
	extern volatile N_ROTE_paket Paket_in;
	
	delay(10000);									//pauza vylouci zakmity
	
	if ((SPI_int & (1 << INT)))						//overeni prijatych dat
 6c4:	b2 9b       	sbis	0x16, 2	; 22
 6c6:	0d c0       	rjmp	.+26     	; 0x6e2 <__vector_18+0x4c>
	{
		LED_1;  									//rozsviceni kontrolni led
 6c8:	c1 9a       	sbi	0x18, 1	; 24

    	Receiv_paket();  							//prijem datoveho paketu
 6ca:	0e 94 99 02 	call	0x532	; 0x532 <Receiv_paket>
//		Receiv_data(*buffer, size);
		if ((Paket_in.Paket_setting & 0x20) == 0x20)//overeni platnosti paketu
 6ce:	80 91 81 00 	lds	r24, 0x0081
 6d2:	85 ff       	sbrs	r24, 5
 6d4:	06 c0       	rjmp	.+12     	; 0x6e2 <__vector_18+0x4c>
		{
			Receiv_int = 1;							//nastaveni priznaku prijmu
 6d6:	81 e0       	ldi	r24, 0x01	; 1
 6d8:	80 93 7c 00 	sts	0x007C, r24
			REC_off;								//deaktivace prijimaciho preruseni
 6dc:	8b b7       	in	r24, 0x3b	; 59
 6de:	8f 7d       	andi	r24, 0xDF	; 223
 6e0:	8b bf       	out	0x3b, r24	; 59
    	}

  	}
	LED_0;											//deaktivace kontrolni led
 6e2:	c1 98       	cbi	0x18, 1	; 24

}
 6e4:	ff 91       	pop	r31
 6e6:	ef 91       	pop	r30
 6e8:	bf 91       	pop	r27
 6ea:	af 91       	pop	r26
 6ec:	9f 91       	pop	r25
 6ee:	8f 91       	pop	r24
 6f0:	7f 91       	pop	r23
 6f2:	6f 91       	pop	r22
 6f4:	5f 91       	pop	r21
 6f6:	4f 91       	pop	r20
 6f8:	3f 91       	pop	r19
 6fa:	2f 91       	pop	r18
 6fc:	0f 90       	pop	r0
 6fe:	0f be       	out	0x3f, r0	; 63
 700:	0f 90       	pop	r0
 702:	1f 90       	pop	r1
 704:	18 95       	reti

00000706 <lcd_write>:
**                     rs   - 0: instrukce; 1: data
**     Výst. hodnota : žádné
** ===================================================================
*/
void lcd_write( char data, char rs )
{
 706:	28 2f       	mov	r18, r24
	unsigned char temp ;

    if( rs ) lcd_rs_high() ;
 708:	66 23       	and	r22, r22
 70a:	11 f0       	breq	.+4      	; 0x710 <lcd_write+0xa>
 70c:	d9 9a       	sbi	0x1b, 1	; 27
 70e:	01 c0       	rjmp	.+2      	; 0x712 <lcd_write+0xc>
	else lcd_rs_low() ;
 710:	d9 98       	cbi	0x1b, 1	; 27

	temp = LCD_PORT & 0x0f ;
 712:	9b b3       	in	r25, 0x1b	; 27
 714:	9f 70       	andi	r25, 0x0F	; 15
    LCD_PORT = temp | ( data & 0xf0 ) ;
 716:	82 2f       	mov	r24, r18
 718:	80 7f       	andi	r24, 0xF0	; 240
 71a:	89 2b       	or	r24, r25
 71c:	8b bb       	out	0x1b, r24	; 27
**     Výst. hodnota : žádné
** ===================================================================
*/
void toggle_e( void )
{
    lcd_e_high() ;
 71e:	db 9a       	sbi	0x1b, 3	; 27
    lcd_e_delay() ;
 720:	00 00       	nop
 722:	00 00       	nop
 724:	00 00       	nop
    lcd_e_low() ;
 726:	db 98       	cbi	0x1b, 3	; 27
	else lcd_rs_low() ;

	temp = LCD_PORT & 0x0f ;
    LCD_PORT = temp | ( data & 0xf0 ) ;
    lcd_e_toggle() ;
    LCD_PORT = temp | (( data & 0x0f ) << 4 ) ;
 728:	22 95       	swap	r18
 72a:	20 7f       	andi	r18, 0xF0	; 240
 72c:	29 2b       	or	r18, r25
 72e:	2b bb       	out	0x1b, r18	; 27
**     Výst. hodnota : žádné
** ===================================================================
*/
void toggle_e( void )
{
    lcd_e_high() ;
 730:	db 9a       	sbi	0x1b, 3	; 27
    lcd_e_delay() ;
 732:	00 00       	nop
 734:	00 00       	nop
 736:	00 00       	nop
    lcd_e_low() ;
 738:	db 98       	cbi	0x1b, 3	; 27
	temp = LCD_PORT & 0x0f ;
    LCD_PORT = temp | ( data & 0xf0 ) ;
    lcd_e_toggle() ;
    LCD_PORT = temp | (( data & 0x0f ) << 4 ) ;
    lcd_e_toggle() ;
    LCD_PORT = temp | 0xf0 ;
 73a:	90 6f       	ori	r25, 0xF0	; 240
 73c:	9b bb       	out	0x1b, r25	; 27
 73e:	80 e4       	ldi	r24, 0x40	; 64
 740:	9f e1       	ldi	r25, 0x1F	; 31
 742:	01 97       	sbiw	r24, 0x01	; 1
 744:	f1 f7       	brne	.-4      	; 0x742 <lcd_write+0x3c>
    _delay_ms( 2 ) ;
}
 746:	08 95       	ret

00000748 <lcd_data>:
**     Parametry     : data - data pro lcd displej
**     Výst. hodnota : žádné
** ===================================================================
*/
void lcd_data( char data )
{
 748:	61 e0       	ldi	r22, 0x01	; 1
 74a:	0e 94 83 03 	call	0x706	; 0x706 <lcd_write>
	lcd_write( data, 1 ) ;
}
 74e:	08 95       	ret

00000750 <lcd_command>:
**     Parametry     : data - instrukce pro lcd diplej
**     Výst. hodnota : žádné
** ===================================================================
*/
void lcd_command( char data )
{
 750:	60 e0       	ldi	r22, 0x00	; 0
 752:	0e 94 83 03 	call	0x706	; 0x706 <lcd_write>
	lcd_write( data, 0 ) ;
}
 756:	08 95       	ret

00000758 <lcd_clrscr>:
**     Parametry     : žádné
**     Výst. hodnota : žádné
** ===================================================================
*/
void lcd_clrscr( void )
{
 758:	81 e0       	ldi	r24, 0x01	; 1
 75a:	0e 94 a8 03 	call	0x750	; 0x750 <lcd_command>
	lcd_command( 0b00000001 ) ;	// smazání displeje
	x = 0 ;					// nulování pomocných souřadnic ...
 75e:	10 92 9f 00 	sts	0x009F, r1
	y = 0 ;					// ... pozice kurzoru
 762:	10 92 a0 00 	sts	0x00A0, r1
 766:	80 e0       	ldi	r24, 0x00	; 0
 768:	9a ef       	ldi	r25, 0xFA	; 250
 76a:	01 97       	sbiw	r24, 0x01	; 1
 76c:	f1 f7       	brne	.-4      	; 0x76a <lcd_clrscr+0x12>
	_delay_ms( 16 ) ;		// nutné zpoždění
}
 76e:	08 95       	ret

00000770 <lcd_init>:
**     Parametry     : žádné
**     Výst. hodnota : žádné
** ===================================================================
*/
void lcd_init( void )
{
 770:	8e ef       	ldi	r24, 0xFE	; 254
 772:	8a bb       	out	0x1a, r24	; 26
 774:	80 e0       	ldi	r24, 0x00	; 0
 776:	9a ef       	ldi	r25, 0xFA	; 250
 778:	01 97       	sbiw	r24, 0x01	; 1
 77a:	f1 f7       	brne	.-4      	; 0x778 <lcd_init+0x8>
	DDR( LCD_PORT ) = 0b11111110 ;// deklarace výstupního portu pro lcd
    _delay_ms( 16 ) ;		// nutné zpoždění
	lcd_command( 0b00100000 ) ; // nastavení 4bitové komunikace
 77c:	80 e2       	ldi	r24, 0x20	; 32
 77e:	0e 94 a8 03 	call	0x750	; 0x750 <lcd_command>
	lcd_command( 0b00101000 ) ;	// nastavení funkce displeje
 782:	88 e2       	ldi	r24, 0x28	; 40
 784:	0e 94 a8 03 	call	0x750	; 0x750 <lcd_command>
	lcd_command( 0b00000100 ) ;	// nastavení směru pohybu kurzoru
 788:	84 e0       	ldi	r24, 0x04	; 4
 78a:	0e 94 a8 03 	call	0x750	; 0x750 <lcd_command>
	lcd_command( 0b00001100 ) ;	// nastavení displeje a kurzoru
 78e:	8c e0       	ldi	r24, 0x0C	; 12
 790:	0e 94 a8 03 	call	0x750	; 0x750 <lcd_command>

	lcd_clrscr() ;			// smazání obsahu lcd displeje (dokončení inicializace)
 794:	0e 94 ac 03 	call	0x758	; 0x758 <lcd_clrscr>
}
 798:	08 95       	ret

0000079a <toggle_e>:
**     Parametry     : žádné
**     Výst. hodnota : žádné
** ===================================================================
*/
void toggle_e( void )
{
 79a:	db 9a       	sbi	0x1b, 3	; 27
    lcd_e_high() ;
    lcd_e_delay() ;
 79c:	00 00       	nop
 79e:	00 00       	nop
 7a0:	00 00       	nop
    lcd_e_low() ;
 7a2:	db 98       	cbi	0x1b, 3	; 27
}
 7a4:	08 95       	ret

000007a6 <lcd_gotoxy>:
**     Parametry     : x_,y_ - nové pozice kurzoru lcd displeje
**     Výst. hodnota : žádné
** ===================================================================
*/
void lcd_gotoxy( char x_, char y_ )
{
 7a6:	0f 93       	push	r16
 7a8:	1f 93       	push	r17
 7aa:	08 2f       	mov	r16, r24
 7ac:	16 2f       	mov	r17, r22
	if( y_ == 0 )
 7ae:	66 23       	and	r22, r22
 7b0:	31 f4       	brne	.+12     	; 0x7be <lcd_gotoxy+0x18>
    {	lcd_command(( 1<<LCD_DDRAM ) + LCD_START_LINE1 + x_ ) ;
 7b2:	80 58       	subi	r24, 0x80	; 128
 7b4:	0e 94 a8 03 	call	0x750	; 0x750 <lcd_command>
		y = 0 ;
 7b8:	10 92 a0 00 	sts	0x00A0, r1
 7bc:	07 c0       	rjmp	.+14     	; 0x7cc <lcd_gotoxy+0x26>
	}
    else if( y_ == 1 )
 7be:	61 30       	cpi	r22, 0x01	; 1
 7c0:	29 f4       	brne	.+10     	; 0x7cc <lcd_gotoxy+0x26>
    {	lcd_command(( 1<<LCD_DDRAM ) + LCD_START_LINE2 + x_ ) ;
 7c2:	80 54       	subi	r24, 0x40	; 64
 7c4:	0e 94 a8 03 	call	0x750	; 0x750 <lcd_command>
		y = 1 ;
 7c8:	10 93 a0 00 	sts	0x00A0, r17
	}
	x = x_ ;
 7cc:	00 93 9f 00 	sts	0x009F, r16
}
 7d0:	1f 91       	pop	r17
 7d2:	0f 91       	pop	r16
 7d4:	08 95       	ret

000007d6 <lcd_secondline>:
**     Parametry     : žádné
**     Výst. hodnota : žádné
** ===================================================================
*/
void lcd_secondline( void )
{
 7d6:	1f 93       	push	r17
    lcd_command(( 1<<LCD_DDRAM ) + LCD_START_LINE2 ) ;
 7d8:	80 ec       	ldi	r24, 0xC0	; 192
 7da:	0e 94 a8 03 	call	0x750	; 0x750 <lcd_command>
	x = 0 ;
 7de:	10 92 9f 00 	sts	0x009F, r1
	y = 1 ;
 7e2:	11 e0       	ldi	r17, 0x01	; 1
 7e4:	10 93 a0 00 	sts	0x00A0, r17
	lcd_puts( "                " ) ;
 7e8:	8b e6       	ldi	r24, 0x6B	; 107
 7ea:	90 e0       	ldi	r25, 0x00	; 0
 7ec:	0e 94 2b 04 	call	0x856	; 0x856 <lcd_puts>
    lcd_command(( 1<<LCD_DDRAM ) + LCD_START_LINE2 ) ;
 7f0:	80 ec       	ldi	r24, 0xC0	; 192
 7f2:	0e 94 a8 03 	call	0x750	; 0x750 <lcd_command>
	x = 0 ;
 7f6:	10 92 9f 00 	sts	0x009F, r1
	y = 1 ;
 7fa:	10 93 a0 00 	sts	0x00A0, r17
}
 7fe:	1f 91       	pop	r17
 800:	08 95       	ret

00000802 <lcd_newline>:
**     Parametry     : žádné
**     Výst. hodnota : žádné
** ===================================================================
*/
void lcd_newline( void )
{
 802:	80 91 a0 00 	lds	r24, 0x00A0
 806:	81 30       	cpi	r24, 0x01	; 1
 808:	19 f4       	brne	.+6      	; 0x810 <lcd_newline+0xe>
	if( y == 1 )
		lcd_firstline() ;
 80a:	0e 94 37 04 	call	0x86e	; 0x86e <lcd_firstline>
 80e:	08 95       	ret
	else
		lcd_secondline() ;
 810:	0e 94 eb 03 	call	0x7d6	; 0x7d6 <lcd_secondline>
 814:	08 95       	ret

00000816 <lcd_putc>:
**     Parametry     : c - znak k zobrazení na lcd displeji
**     Výst. hodnota : žádné
** ===================================================================
*/
void lcd_putc( char c )
{
 816:	1f 93       	push	r17
 818:	18 2f       	mov	r17, r24
    if (c=='\n')
 81a:	8a 30       	cpi	r24, 0x0A	; 10
 81c:	19 f4       	brne	.+6      	; 0x824 <lcd_putc+0xe>
		lcd_newline() ;
 81e:	0e 94 01 04 	call	0x802	; 0x802 <lcd_newline>
 822:	17 c0       	rjmp	.+46     	; 0x852 <lcd_putc+0x3c>
	else
	{
        if(( x == LCD_DISP_LENGTH ) && ( y == 0 ))
 824:	80 91 9f 00 	lds	r24, 0x009F
 828:	80 31       	cpi	r24, 0x10	; 16
 82a:	59 f4       	brne	.+22     	; 0x842 <lcd_putc+0x2c>
 82c:	80 91 a0 00 	lds	r24, 0x00A0
 830:	88 23       	and	r24, r24
 832:	19 f4       	brne	.+6      	; 0x83a <lcd_putc+0x24>
			lcd_secondline() ;
 834:	0e 94 eb 03 	call	0x7d6	; 0x7d6 <lcd_secondline>
 838:	04 c0       	rjmp	.+8      	; 0x842 <lcd_putc+0x2c>
		else if(( x == LCD_DISP_LENGTH ) && ( y == 1 ))
 83a:	81 30       	cpi	r24, 0x01	; 1
 83c:	11 f4       	brne	.+4      	; 0x842 <lcd_putc+0x2c>
			lcd_firstline() ;
 83e:	0e 94 37 04 	call	0x86e	; 0x86e <lcd_firstline>
	    lcd_data( c ) ;
 842:	81 2f       	mov	r24, r17
 844:	0e 94 a4 03 	call	0x748	; 0x748 <lcd_data>
		x++ ;
 848:	80 91 9f 00 	lds	r24, 0x009F
 84c:	8f 5f       	subi	r24, 0xFF	; 255
 84e:	80 93 9f 00 	sts	0x009F, r24
	}
}
 852:	1f 91       	pop	r17
 854:	08 95       	ret

00000856 <lcd_puts>:
**     Parametry     : *s - ukazatel na řetězec znaků
**     Výst. hodnota : žádné
** ===================================================================
*/
void lcd_puts( const char *s )
{
 856:	cf 93       	push	r28
 858:	df 93       	push	r29
 85a:	ec 01       	movw	r28, r24
 85c:	02 c0       	rjmp	.+4      	; 0x862 <lcd_puts+0xc>
    register char c ;

    while(( c = *s++ ))
        lcd_putc( c ) ;
 85e:	0e 94 0b 04 	call	0x816	; 0x816 <lcd_putc>
*/
void lcd_puts( const char *s )
{
    register char c ;

    while(( c = *s++ ))
 862:	89 91       	ld	r24, Y+
 864:	88 23       	and	r24, r24
 866:	d9 f7       	brne	.-10     	; 0x85e <lcd_puts+0x8>
        lcd_putc( c ) ;
}
 868:	df 91       	pop	r29
 86a:	cf 91       	pop	r28
 86c:	08 95       	ret

0000086e <lcd_firstline>:
**     Parametry     : žádné
**     Výst. hodnota : žádné
** ===================================================================
*/
void lcd_firstline( void )
{
 86e:	80 e8       	ldi	r24, 0x80	; 128
 870:	0e 94 a8 03 	call	0x750	; 0x750 <lcd_command>
    lcd_command(( 1<<LCD_DDRAM ) + LCD_START_LINE1 ) ;
	x = 0 ;
 874:	10 92 9f 00 	sts	0x009F, r1
	y = 0 ;
 878:	10 92 a0 00 	sts	0x00A0, r1
	lcd_puts( "                " ) ;
 87c:	8b e6       	ldi	r24, 0x6B	; 107
 87e:	90 e0       	ldi	r25, 0x00	; 0
 880:	0e 94 2b 04 	call	0x856	; 0x856 <lcd_puts>
    lcd_command(( 1<<LCD_DDRAM ) + LCD_START_LINE1 ) ;
 884:	80 e8       	ldi	r24, 0x80	; 128
 886:	0e 94 a8 03 	call	0x750	; 0x750 <lcd_command>
	x = 0 ;
 88a:	10 92 9f 00 	sts	0x009F, r1
	y = 0 ;
 88e:	10 92 a0 00 	sts	0x00A0, r1
}
 892:	08 95       	ret

00000894 <strcpy>:
 894:	fb 01       	movw	r30, r22
 896:	dc 01       	movw	r26, r24
 898:	01 90       	ld	r0, Z+
 89a:	0d 92       	st	X+, r0
 89c:	00 20       	and	r0, r0
 89e:	e1 f7       	brne	.-8      	; 0x898 <strcpy+0x4>
 8a0:	08 95       	ret

000008a2 <_exit>:
 8a2:	f8 94       	cli

000008a4 <__stop_program>:
 8a4:	ff cf       	rjmp	.-2      	; 0x8a4 <__stop_program>
