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2018:si470x-rds
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2018:si470x-rds [2019/01/28 08:06] Radovan Juráň [Postup práce] |
2018:si470x-rds [2019/01/28 08:32] (aktuální) Radovan Juráň |
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|---|---|---|---|
| Řádek 68: | Řádek 68: | ||
| <code c> | <code c> | ||
| + | uint8_t si4703_registers[32] = ""; | ||
| + | //force zeros at initial state by default, https://stackoverflow.com/questions/18688971/c-char-array-initialization | ||
| + | |||
| /* 1. Supply VA and VD. */ | /* 1. Supply VA and VD. */ | ||
| /*2. Supply VIO while keeping the RST pin low. Note that power supplies may be sequenced in any order (steps 1 | /*2. Supply VIO while keeping the RST pin low. Note that power supplies may be sequenced in any order (steps 1 | ||
| Řádek 75: | Řádek 78: | ||
| /*3. Configure the proper pins for bus mode selection. See Figure 3, “Powerup, Powerdown, and Reset Flowchart,” | /*3. Configure the proper pins for bus mode selection. See Figure 3, “Powerup, Powerdown, and Reset Flowchart,” | ||
| on page 7.*/ | on page 7.*/ | ||
| - | HAL_GPIO_WritePin(GPIOC, I2C3_SDA, GPIO_PIN_RESET); | + | HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_RESET); |
| HAL_Delay(1); // some delay needed | HAL_Delay(1); // some delay needed | ||
| Řádek 83: | Řádek 86: | ||
| /*5. Provide RCLK. If using the internal oscillator option, set the XOSCEN bit. Provide a sufficient delay before | /*5. Provide RCLK. If using the internal oscillator option, set the XOSCEN bit. Provide a sufficient delay before | ||
| - | setting the ENABLE bit to ensure that the oscillator has stabilized. The delay will vary depending on the external oscillator circuit and the ESR of the crystal, and it should include margin to allow for device tolerances. The | + | setting the ENABLE bit to ensure that the oscillator has stabilized. The delay will vary depending on the external |
| + | oscillator circuit and the ESR of the crystal, and it should include margin to allow for device tolerances. The | ||
| recommended minimum delay is no less than 500 ms. A similar delay may be necessary for some external | recommended minimum delay is no less than 500 ms. A similar delay may be necessary for some external | ||
| oscillator circuits. Determine the necessary stabilization time for the clock source in the system. | oscillator circuits. Determine the necessary stabilization time for the clock source in the system. | ||
| Řádek 93: | Řádek 97: | ||
| device tolerances.*/ | device tolerances.*/ | ||
| HAL_I2C_MspInit(&hi2c3); //wake up the I2C | HAL_I2C_MspInit(&hi2c3); //wake up the I2C | ||
| + | HAL_I2C_Master_Receive(&hi2c3, SI4703_ADDRESS, si4703_registers, 32, 100); //read for being able to modify | ||
| /*6. Si4703-C19 Errata Solution 2: Set RDSD = 0x0000. Note that this is a writable register.*/ | /*6. Si4703-C19 Errata Solution 2: Set RDSD = 0x0000. Note that this is a writable register.*/ | ||
| /*7. Set the ENABLE bit high and the DISABLE bit low to powerup the device.*/ | /*7. Set the ENABLE bit high and the DISABLE bit low to powerup the device.*/ | ||
| - | |||
| - | HAL_I2C_Master_Receive(&hi2c3, SI4703_ADDRESS, si4703_registers, 32, 100); | ||
| </code> | </code> | ||
2018/si470x-rds.1548659180.txt.gz · Poslední úprava: 2019/01/28 08:06 autor: Radovan Juráň
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